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OPERATION

Page 16 TM-6703 Progressive Scan Double Speed Shutter Camera

3.1.7 Integration

Integration times can vary depending on the speciﬁc application. Pin #11 of the 12-pin connector is

integration control. It accepts standard TTL inputs. High is considered 5 volts, and Low is considered 0

volts. When a low is applied to pin #11, the integration process begins. Integration blocks the transfer

gate of the image data out of the CCD array. Upon returning the signal back to high (which is required

to end the process). the image is output upon the next regular transfer.

FIGURE 11. Integration Timing

When the integration signal is set back to high (5 volts), the image data will not move out of the CCD

array until the transfer gate occurs. Sg’s occur 9H after the start of the VD. For example, if the camera is

set to expose for 1.5 frame times, the actual exposure is for 2 frame times because the array is still

accumulating light until the sg of that ﬁeld (or frame if ﬁeld mode). The remaining image data acquired

before the start of the integration may also be output.

NOTE: The camera should be in normal mode during integration.

3.1.8 External Input Signals

FIGURE 12. Internal Input Signals

freq.

(

)

sec

freq.

(

)

sec

freq.

(

)

sec

freq.

(

)

sec

freq.

(

)

sec

freq.

(

)

sec

Vertical Sync.

(VD)

CCD Transfer

(SG)

yields 2 frames of exposure

yields 3 frames of exposure

Integration Signal

Example #1

NOTE: Integration may be controlled in increments of frame times only.

H = 1/horizontal frequency.

Integration Signal

Example #2

1 - 2µsec.

1 to 9H

1/HD frequency

TTL Level

+5Volts

0 Volts

+5Volts

0 Volts

1/VD frequency

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 30 31

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